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13,265 Commits 4 Branches 34 Tags
bb5d3c45af5deb30506b428338283de25f9355bc
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256 Commits

Author SHA1 Message Date
Vladimir Mandic 6261c68396 add Step1X-Edit 
Co-authored-by: Copilot <copilot@github.com>
Signed-off-by: Vladimir Mandic <mandic00@live.com>
 2026-05-05 09:31:05 +02:00
Disty0 cc0f06d64f SNDQ unify Triton MM configs 2026-05-04 15:14:30 +03:00
awsr e9d74cea72 Fix typing 2026-04-23 16:49:50 -07:00
resonantsky cefad871b9 fix rdna2 variable name: is_rdna2 -> is_rdna2_and_older 2026-04-17 18:44:24 +02:00
resonantsky 576d566429 established rdna2 best configs 2026-04-17 16:46:41 +02:00
Disty0 33726b5019 Update triton mm config 2026-04-16 20:51:10 +03:00
Disty0 eba2c3a8a3 SDNQ update RDNA2 detection 2026-04-16 08:34:17 +03:00
Disty0 85ec9bf137 SDNQ fix post load quant 2026-04-16 00:38:54 +03:00
Disty0 ed5019116b cleanup 2026-04-16 00:25:21 +03:00
Disty0 9960b371d1 cleanup 2026-04-16 00:22:52 +03:00
Disty0 68a5fe6342 SDNQ add fp8 mm info to modules_quant_config 2026-04-16 00:18:42 +03:00
Disty0 8a1743712a SDNQ disable FP8 MM on dynamic quant with unsupported GPUs 2026-04-15 23:28:20 +03:00
Disty0 202f12ea6c SDNQ disable fp8 mm with pre-quants on unsupported gpus 2026-04-15 23:12:46 +03:00
vladmandic 84c2ddc5ca linting 
Signed-off-by: vladmandic <mandic00@live.com>
 2026-04-13 12:18:05 +02:00
Disty0 a16ff95f18 SDNQ add nn.Embedding quantization support and add Gemma4 keys 2026-04-10 18:46:58 +03:00
Disty0 b2e071dc52 cleanup 2026-04-04 01:39:26 +03:00
Disty0 470a0d816e SDNQ add tensor descriptor kernel to triton mm for Intel Arc 2026-04-04 01:32:34 +03:00
Disty0 06fe4c7f20 SDNQ cleanup triton_mm 2026-03-29 00:44:58 +03:00
Disty0 005eb789a3 SDNQ use combination config for Triton MM 2026-03-28 18:02:17 +03:00
Disty0 6eadf40f33 SDNQ add ufp aliases 2026-03-27 21:31:36 +03:00
Disty0 10942032a3 Add SDNQ_COMPILE_KWARGS env var 2026-03-25 02:10:58 +03:00
Disty0 11f3921832 SDNQ make dyn loss threshold auto selected by default 2026-03-25 01:47:59 +03:00
awsr c4ebef29a9 RUF013 updates 2026-03-24 05:48:19 -07:00
Disty0 f35e644d44 cast svd to torch_dtype 2026-03-11 14:50:14 +03:00
Disty0 e202d43801 SDNQ set sdnq_dequantize_fp32 to True by default 2026-03-11 14:35:11 +03:00
Disty0 30d21f420f Allow all types in dyn quant 2026-03-11 13:46:24 +03:00
Disty0 b02a63c60c SDNQ update minimum dtype check 2026-03-11 04:12:37 +03:00
Disty0 76b184a9fe fix fp16 mm is selected instead of fp8 mm 2026-03-11 03:55:43 +03:00
Disty0 d9e628574a SDNQ add 15, 13, 11 and 9 bit support 2026-03-11 03:39:02 +03:00
Disty0 9fbe70195f SDNQ add 14, 12 and 10 bit support 2026-03-09 23:05:08 +03:00
Disty0 0160f6b3ef add sdnq variants of pytorch native fp formats too 2026-02-24 20:08:41 +03:00
Disty0 78efbc7e85 update sdnq 2026-02-24 19:47:30 +03:00
Vladimir Mandic bfe014f5da modernize typing 2026-02-19 09:15:37 +01:00
Disty0 f439d51ea7 SDNQ update CosmosTransformer3DModel keys 2026-02-04 10:19:23 +03:00
Disty0 df30ba28ac SDNQ clamp weight_std and add CosmosTransformer3DModel keys 2026-02-04 00:31:00 +03:00
Disty0 ced81d630d cleanup 2026-02-02 20:30:52 +03:00
Disty0 90cf83b90e update sdnq 2026-02-02 20:22:29 +03:00
vladmandic a4671045b6 lint and crlf 
Signed-off-by: vladmandic <mandic00@live.com>
 2026-01-24 10:28:46 +01:00
Disty0 8d6bfcd827 Update SDNQ 2026-01-23 14:39:07 +03:00
Disty0 784cda80aa update sdnq 2026-01-14 16:23:26 +03:00
Disty0 47dcab3522 update sdnq 2026-01-09 00:34:32 +03:00
Seunghoon Lee 49965dfda8 get_hip_arch_name -> get_hip_agent, use amdhip64_7.dll served within rocm package 2026-01-03 21:00:36 +09:00
vladmandic b9c18452f2 unify hip get arch name 
Signed-off-by: vladmandic <mandic00@live.com>
 2026-01-03 08:22:19 +01:00
vladmandic 4e8b0f83b4 lint 
Signed-off-by: vladmandic <mandic00@live.com>
 2026-01-01 16:33:49 +01:00
Disty0 8e34866238 SDNQ fix outdated PyTorch 2025-12-30 21:29:41 +03:00
Disty0 5e934a12a2 sdnq cleanup unused args 2025-12-28 20:08:58 +03:00
Disty0 b852ff42ef SDNQ fix wrong fp8 mm type is set 2025-12-27 17:27:05 +03:00
Disty0 db59d2b507 SDNQ handle packed floats in fp mm 2025-12-27 16:29:18 +03:00
Disty0 448e7b7735 replace the default fp6 type 2025-12-27 02:10:12 +03:00
Disty0 761fb82685 fix missing comma 2025-12-26 21:27:57 +03:00