6591 Commits

Author	SHA1	Message	Date
Disty0	d8aaffbc27	IPEX fix DPM2++ FlowMatch	2025-06-17 19:58:20 +03:00
Disty0	26800a1ef9	Cleanup sdnq	2025-06-17 02:05:13 +03:00
Disty0	bddd091300	Custom VAE loading support for Lumina 2	2025-06-16 22:34:02 +03:00
Disty0	319af31d25	Custom UNet loading support for Lumina 2	2025-06-16 13:28:30 +03:00
Disty0	892dd456f7	Fix Nunchaku	2025-06-16 02:43:49 +03:00
Disty0	4fa48e4084	Use te hijcak for with lumina 2	2025-06-15 22:19:56 +03:00
Disty0	a7811da267	Teacache support for Lumina 2	2025-06-15 22:07:58 +03:00
Disty0	d31df8c1eb	SDNQ fuse bias into dequantizer with matmul	2025-06-14 22:10:10 +03:00
Disty0	25fc0094a9	SDNQ use quantize_device and return_device args and fix decompress_fp32 always being on	2025-06-14 21:29:08 +03:00
Disty0	24194201cf	Fix OmniGen	2025-06-14 19:55:43 +03:00
Disty0	c01802d9ff	SDNQ fix transformers llm	2025-06-14 01:13:51 +03:00
Disty0	8f8e5ce1b0	Cleanup x2	2025-06-14 01:08:25 +03:00
Disty0	2ba64abcde	Cleanup	2025-06-14 00:54:18 +03:00
Disty0	45827a923f	IPEX fix torch.cuda.set_device	2025-06-13 16:20:21 +03:00
Disty0	90e76b2023	Cleanup	2025-06-13 13:42:13 +03:00
Disty0	fb7280c3f4	Flux quanto fix logged dtype	2025-06-13 13:40:44 +03:00
Disty0	1fca565178	Cleanup	2025-06-13 13:37:12 +03:00
Disty0	e68f9272e8	Disable custom atten processors for non SD 1.5 / SDXL models	2025-06-13 13:05:46 +03:00
Disty0	cb4684cbeb	SNDQ add separate quant mode option for Text Encoders	2025-06-13 12:42:57 +03:00
Disty0	c8f947827b	IPEX fix Lumina2	2025-06-12 19:46:05 +03:00
Disty0	41f14df8f5	Fix TAESD and double downloading with Lumina2	2025-06-12 14:17:36 +03:00
Disty0	5e013fb154	SDNQ optimize input quantization and use the word quantize instead of compress	2025-06-12 12:06:57 +03:00
Disty0	2d05396b4e	SDNQ simplify sym scale formula	2025-06-12 02:26:04 +03:00
Disty0	26545b6483	Add warning for incompatible attention processors	2025-06-11 21:59:59 +03:00
Disty0	dd84fb541f	Always set sdpa params	2025-06-11 21:43:48 +03:00
Disty0	5cefa64a60	SDNQ update accepted dtypes	2025-06-11 20:58:54 +03:00
Disty0	74b6edf2df	revert gfx1101	2025-06-11 19:25:05 +03:00
Disty0	6aa5c08fb0	Cleanup and update changelog	2025-06-11 16:03:33 +03:00
Disty0	71be3c7d45	ROCm don't override gfx with gfx1100 and gfx1101 + rocm 6.4	2025-06-11 15:47:25 +03:00
Disty0	df6b13ea47	Don't set gfx override with RX 9000 and above	2025-06-11 15:09:03 +03:00
Disty0	c81b712ddb	Make VAE options not require model reload	2025-06-10 15:56:19 +03:00
Disty0	78f99abec8	SDNQ use group_size / 2 for convs	2025-06-10 15:29:24 +03:00
Disty0	33fadf946b	SDNQ add 7 bit support	2025-06-10 11:33:06 +03:00
Disty0	5bd7a08877	don't use inplace ops in quant layer	2025-06-10 03:29:07 +03:00
Disty0	5eed9135e3	Split SDNQ into multiple files and linting	2025-06-10 03:18:25 +03:00
Disty0	58b646e7f2	SDNQ add 5-bit and 3-bit quantization support	2025-06-10 01:48:51 +03:00
Disty0	bd2d9d1677	Python 3.13 support	2025-06-09 22:58:08 +03:00
Disty0	8e08ef0edc	Fix VAE Tiling with non-default tile sizes	2025-06-07 01:25:08 +03:00
Disty0	2f7aff5250	Fix TAESD previews with PixArt	2025-06-06 19:43:00 +03:00
Disty0	5624671191	Fix PixArt Sigma Small and Large	2025-06-06 19:25:26 +03:00
Disty0	089e437708	Don't set attention processors with models outside of SD 1.5 and SDXL	2025-06-06 18:53:57 +03:00
Disty0	c039ba90f6	Fix Meissonic by adding multiple generator support	2025-06-06 18:02:49 +03:00
Disty0	7679028c1a	Override CPU to use FP32 by default	2025-06-06 15:33:51 +03:00
Disty0	2ccc76ab91	Increase medvram mode to 12 GB and update wiki	2025-06-06 15:27:30 +03:00
Disty0	9a54efda9b	Cleanup	2025-06-06 01:55:35 +03:00
Disty0	06fcc3cf85	SDNQ add quantized matmul support for Conv1d and Conv3d too	2025-06-06 00:19:54 +03:00
Disty0	976f0ba61f	Cleanup	2025-06-05 20:59:58 +03:00
Disty0	413cf54cb6	Update changelog	2025-06-05 18:11:36 +03:00
Disty0	8c03f78197	Fix bias is None	2025-06-05 14:37:00 +03:00
Disty0	1a00517338	SDNQ FP8 matmul support for Conv2d	2025-06-05 14:32:26 +03:00